关键词: ⁺芯片原子钟, 倍频器, 专用芯片

Abstract: By analyzing the affection on atomic clock stability, the demanding for the frequency multiplier has been offered. In comparison with several typical configurations, a novel frequency multiplier scheme consisting of synthesizer, orthogonal mixer and DDS has been designed. Guided by the design, the first prototype fabricated with individual components has been completed; the frequency stability is 4.7E-12/s after locking, and this design can be qualified for atomic clock. Basing on the design scheme, the special 3.4 GHz ASIC has been fabricated, and the chipscale atomic clock incorporated the ASIC arrived to 5.5E-11/s, which proves that the ASIC can satisfy the design requirements of chipscale atomic clock.

Key words: ⁺Chip-scale atomic clock, Multiplier, Special Chip