Abstract: The synchronous packet transmits lends to the problem of asymmetry packet queuing delays and delay jitter by ethernet switch. This problem has a significant impact on IEEE1588 time synchronization precision. To solve it， transparent clock is defined by the IEEE1588v2.In this paper, we introduce transparent clock of IEEE1588v2, proposing a implement scheme of transparent clock based on transparent clock’s principle and model, creating a supporting IEEE1588 ethernet switch with transparent clock. To verify the function of transparent clock, an experimental setup that was analogous to a practical environment. The experiment test results demonstrate that this device efficiently solve the problem of asymmetry packet queuing delays and delay jitter in the condition of different network traffic and the time synchronization precision is at nanosecond level.

Key words: Time synchronous, IEEE1588v2, Transparent clock, Ethernet switch